The development of semiconductor switching technology for high power applications, such as in motor drive circuits and lighting ballasts, began with the bipolar junction transistor (BJT). Although BJT's can meet various requirements, there exist several fundamental drawbacks to the suitability of BJT's for all high power applications. For example, BJT's are current controlled devices, which makes the base drive circuitry complex and expensive. Furthermore, the input impedance of BJT's is too low. The power MOSFET was developed to overcome the existing problems. In a power MOSFET, a gate electrode bias is applied for turn-on and turn-off control. Despite power MOSFET devices have many advantages, these benefits are offset by the high ON-resistance of their active region, which arises from the absence of minority carrier injection. As a result, the device's operating forward current density is limited to relatively low values, as compared to that for the BJT. On the basis of these features of power BJT's and MOSFET devices, hybrid devices embodying a combination of bipolar current conduction with MOS-controlled current flow were developed and found to provide significant advantages over single technologies such as bipolar or MOSFET alone. Insulated gate bipolar transistor (IGBT) and emitter switched thyristor (EST) are two of them.
A typical IGBT comprises, as shown in FIG. 1, a P.sup.+ collector region 10, an N.sup.+ buffer layer 12, an N.sup.- drift layer 14, a P-type base region 16 and an N.sup.+ emitter region 18. A gate 20 is disposed above the base region 16, and a gate oxide 22 is formed therebetween. Two metal layers 24 and 26 are formed as emitter and collector electrode regions, respectively. Although IGBT's suffer a lower ON loss due to their conductivity modulation in drift region over using bipolar or MOSFET devices alone, even lower conduction losses can be expected by using a thyristor since thyristors offer a higher degree of conductivity modulation and a lower forward voltage drop when turned on.
FIG. 2 schematically shows an EST, which comprises a P.sup.+ anode region 30, an N.sup.+ buffer layer 32, an N.sup.- drift layer 34, a P-type base region 36, an N.sup.+ floating region 38 and an N.sup.+ cathode region 40. A gate 42 is provided above a region between the floating region 38 and the cathode region 40, and a gate oxide 44 is inserted therebetween. Metal layers 24 and 26 serve as cathode and anode electrode regions, respectively. Unfortunately, latch-up may be sustained for high current applications due to a parasitic thyristor thereof, which can result in device failure if the latch-up current is not otherwise sufficiently controlled by external circuitry.
The latch-up can be inhibited with a trench IGBT, which is shown in FIG. 3. However, its conductivity impedance modulation is not comparable to an EST, and the trench related to the gate 20' is subjected to a higher voltage. On the other hand, the latch-up is inevitable, since an EST cannot be provided with a trench gate.
Endeavors have been made to overcome the disadvantages of IGBT's or EST's. Bauer et al. utilizes a recombination layer buried in an IGBT in U.S. Pat. No. 4,985,741 to avoid latch-up. Sakurai suppresses latch-up in an IGBT with U.S. Pat. No. 5,089,864. Fujihira et al. in U.S. Pat. No. 5,097,302 detects the load current to avoid IGBT burnout. Sakurai improves conductivity modulation of an IGBT in U.S. Pat. No. 5,200,632. Hiraki et al. and Iwamura reduce conduction impedance by increasing trench depth in U.S. Pat. No. 5,282,018 and by using double gates in U.S. Pat. No. 5,659,185, respectively. Baliga in U.S. Pat. No. 5,306,930 and Shekar et al. in U.S. Pat. Nos. 5,293,054 and 5,294,816 disclose various mechanisms to suppress latch-up of parasitic thyristors in EST's. Otsuki et al. integrates IGBT with EST in U.S. Pat. No. 5,378,903. Shekar et al. uses a dual-channel trench FET to suppress EST latch-up in U.S. Pat. No. 5,471,075. Salurai et al., Seki and Iwamura use a dual-gate to switch between thyristor structure and IGBT to reduce conduction voltage drop in U.S. Pat. Nos. 5,459,339, 5,349,212 and 5,644,150, respectively. Ajit removes parasitic thyristor from an EST in U.S. Pat. No. 5,719,411. Oh in U.S. Pat. No. 5,844,285 makes hole current into the cathode of a thyristor before they flow into the primary emitter to prevent the parasitic thyristor from being turned on. However, these prior arts cannot overcome all of the above-mentioned problems or may cause other disadvantages. Therefore, it is desired a bipolar transistor of a high input impedance, a low conduction voltage drop, a high voltage withstand, with a high current density, and free from damaged by latch-up.